1. Field of the Invention
The present invention relates generally to electronics and computers.
2. Description of the Background Art
Interconnects of various kinds pose a significant failure mechanism for computer servers. A typical failure mode for interconnects is for a loss of continuity (an open circuit) to occur due to mechanical stress, vibrations, shock, contaminant build-up, poor assembly, and other reasons. This loss of continuity can cause system failures, which are difficult and costly to debug.
Run-time errors occur that may or may not be caused by an interconnect failure. For example, such a run-time error may be a parity error, or a lost clock signal. Determining whether or not the error is due to an interconnect failure is problematic in prior systems and may require the cumbersome step of manually reseating of the part in the connector.
The above-described problems and disadvantages may be overcome by utilizing embodiments of the present invention.